Mastering Risc V – From Concept To Fabrication
ABOUT EVENT
Mastering RISC V: From Concept to Fabrication
Unlock the Power of RISC-V for the Next Era of Computing!
A masterclass for engineers and aspiring chip designers to explore RISC-V architecture and its impact on the future of computing.
Workshop conducted by
Mr.Shaik Aleem Ur Rehaman,
ASIC Design and Verification Engineer, Microsoft